In memory systems with non-volatile memory, such as NAND Flash memory, reading a word line in a block of memory can cause errors in data stored in neighboring word lines by changing the stored voltage. This effect is known as “read disturb.” Because a read disturb error occurs in neighboring word lines, there is no indication when reading a given word line that the read to that word line caused a read disturb error in a neighboring word line. Various techniques have been developed for attempting to directly or indirectly detect read disturb errors. For example, when a given word line is read, the memory system can also read neighboring word lines to determine if the number of read errors in that neighboring word line exceeds a threshold, which would indicate that the neighboring word line was read disturbed. As another example (referred to as “read patrol”), the memory system can randomly or serially read word lines to look for errors. As yet another example, the memory system can count the number of reads to each block, and when the number of reads to a given block exceeds a threshold, the memory system can assume that a read disturb error may have likely occurred in the block.
Regardless of the detection technique used, when a read disturb error is found or assumed in a block, the memory system can “scrub” the block (i.e., move the data from the block to a new block (error correcting, as necessary), and erase the old block and put it into the pool of free blocks). Moving the data to the new block removes the deleterious effects of read disturb by setting the stored voltage to the proper amount.
Overview
Embodiments of the present invention are defined by the claims, and nothing in this section should be taken as a limitation on those claims.
By way of introduction, the below embodiments relate to a memory system and method for reducing read disturb errors. In one embodiment, a memory system detects a read disturb error in a level one block. The memory system moves data stored in the level one block to a level two block and monitors read accesses to the level two block to determine what data in the level two block is frequently read. The memory system then moves the data that was determined to be frequently read from the level two block to a level three block and monitors read accesses to the data in the level three block to determine if the data in the level three block is read less frequently. In response to determining that the data in the level three block is read less frequently, the memory system moves the data from the level three block to a level one block.
In another embodiment, a memory system is provided comprising a plurality of blocks of memory and a controller. The controller is configured to detect a read disturb error in a block, identify data that caused the read disturb error, and move the data that caused the read disturb error to a block with a higher read endurance.
In yet another embodiment, a memory system is provided comprising a plurality of blocks of memory, a plurality of read counters, and a read disturb module. The read disturb module is configured to detect a read disturb error in a first block, move data from the first block to a second block, assign read counters to the second block to identify hot read data, move the hot read data from the second block to a third block, assign read counters to the third block to determine when the hot read data becomes cold read data, and move the cold read data from the third block to another block.
Other embodiments are possible, and each of the embodiments can be used alone or together in combination. Accordingly, various embodiments will now be described with reference to the attached drawings.